Systems Engineers

IC Layout Designer

Job Description

The successful candidate will work with various groups to design, layout and verify photolithography mask sets to fabricate iMoD-based display devices. Physical layout responsibilities will include creating MEMS devices, iMoDs, and routing to these devices. The candidate will also be running DRC to ensure design is in compliance with the design rules. Documentation responsibilities include compiling design dimensions, design rules, and assumptions used to create mask sets.

Job Requirements

Candidate will interface with mask vendors to order, track and inspect mask sets. In addition, this individual will support all project groups by checking and verifying drawings and schematics to/from vendors, providing support on all current and past layouts and interfacing with the fab on mask availability and status. The successful candidate will also be involved in the transition of the CAD system from Tanner to Cadence.

Additional Skills and Experiences

Candidate with 3-5 years experience in MEMS or Semiconductor IC layout, proven experience in Cadence or Tanner LEdit. Must be a good team player and passionate about advanced layout.

To apply, please send resume in Word format to cajobs@calnet.com. Reference job number ICLA.